Research-grade epitaxial wafers

Unlike traditional vapor–liquid–solid (VLS) growth, our technique avoids metal catalysts such as Au, thereby eliminating contamination risks that degrade device performance. Instead, we achieve direct InAs heteroepitaxy through a Volmer–Weber growth mechanism, supported by poly(L-lysine) surface treatment that enhances nucleation selectivity and array uniformity.

Key advantages include:

• Position-controlled nanowire growth using photolithography-defined SiNx masks (2–4 µm holes)
• Single nanowire per site enabled by adatom diffusion length engineering
• Uniform geometry: ~300 nm diameter, ~7 µm height
• Stacking-fault-rich crystal phase (ZB/WZ mix) with negligible misfit dislocations
• Rectifying I–V behavior demonstrating heterojunction formation on p-Si

Process Highlights:

• Growth method: MOCVD (Metal-Organic Chemical Vapor Deposition)
• Substrate: p-type Si (111) with SiNx masking
• Growth temperature: 610 °C
• Pressure: 100 mbar
• V/III ratio optimized for vertical nanowire formation
• No Au or foreign catalysts used

Performance Insights:

• Precise control of nanowire number and morphology by tuning pattern size, growth pressure, and precursor flow rates
• Excellent vertical alignment and epitaxial interface quality verified by TEM and XRD
• Scalable array fabrication compatible with standard CMOS processing